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<p>USBC OTG Driver header file.  
<a href="#details">More...</a></p>
<div class="textblock"><code>#include &quot;<a class="el" href="compiler_8h_source.html">compiler.h</a>&quot;</code><br/>
<code>#include &quot;<a class="el" href="preprocessor_8h_source.html">preprocessor.h</a>&quot;</code><br/>
</div>
<p><a href="usbc__otg_8h_source.html">Go to the source code of this file.</a></p>
<table class="memberdecls">
<tr><td colspan="2"><h2><a name="define-members"></a>
Defines</h2></td></tr>
<tr><td colspan="2"><div class="groupHeader">USBC IP properties</div></td></tr>
<tr><td colspan="2"><div class="groupText"><p>These macros give access to IP properties </p>
</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__otg__group.html#ga276fd7e676117783fc8d3a45aeda3351">otg_get_ip_name</a>()&#160;&#160;&#160;(((uint64_t)AVR32_USBC.uname2&lt;&lt;32)|(uint64_t)AVR32_USBC.uname1)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Get IP name part 1 or 2.  <a href="group__otg__group.html#ga276fd7e676117783fc8d3a45aeda3351"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__otg__group.html#ga60eb9bc13cc48c77512db1849b54c4eb">otg_data_memory_barrier</a>()&#160;&#160;&#160;(AVR32_USBC.uvers)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Instruction to access at a peripheral register after interrupt clear, see AVR32002 - AVR32UC Technical reference $6.6 Memory barriers.  <a href="group__otg__group.html#ga60eb9bc13cc48c77512db1849b54c4eb"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__otg__group.html#ga44d71ccfd479392e4bbfd49057c4bf32">otg_get_ip_version</a>()&#160;&#160;&#160;(Rd_bitfield(AVR32_USBC.uvers, AVR32_USBC_UVERS_VERSION_NUM_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Get IP version.  <a href="group__otg__group.html#ga44d71ccfd479392e4bbfd49057c4bf32"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__otg__group.html#ga9ed10ed0cd9edede61a871d74b1d6859">otg_get_metal_fix_nbr</a>()&#160;&#160;&#160;(Rd_bitfield(AVR32_USBC.uvers, AVR32_USBC_UVERS_METAL_FIX_NUM_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Get number of metal fixes.  <a href="group__otg__group.html#ga9ed10ed0cd9edede61a871d74b1d6859"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__otg__group.html#gadfdcbe969406b8f621bfd82699361e5c">otg_get_dpram_size</a>()&#160;&#160;&#160;(128 &lt;&lt; Rd_bitfield(AVR32_USBC.ufeatures, AVR32_USBC_UFEATURES_FIFO_MAX_SIZE_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Get DPRAM size (FIFO maximal size) in bytes.  <a href="group__otg__group.html#gadfdcbe969406b8f621bfd82699361e5c"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__otg__group.html#gac0da3ffdf225df7c33fef4f535147db0">Is_otg_dpram_byte_write_capable</a>()&#160;&#160;&#160;(Tst_bits(AVR32_USBC.ufeatures, AVR32_USBC_UFEATURES_BYTE_WRITE_DPRAM_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Test if DPRAM is natively byte write capable.  <a href="group__otg__group.html#gac0da3ffdf225df7c33fef4f535147db0"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__otg__group.html#ga00fe620dc8bbaa5707c691621f77321c">otg_get_ip_paddress_size</a>()&#160;&#160;&#160;(AVR32_USBC.uaddrsize)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Get size of USBC PB address space.  <a href="group__otg__group.html#ga00fe620dc8bbaa5707c691621f77321c"></a><br/></td></tr>
<tr><td colspan="2"><div class="groupHeader">USBC OTG ID pin management</div></td></tr>
<tr><td colspan="2"><div class="groupText"><p>These macros manage the ID pin use or not to switch between Host or Device mode </p>
</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__otg__group.html#ga1eac01e72e370946e44c6e372e77a394">OTG_ID_PIN</a>&#160;&#160;&#160;ATPASTE2(OTG_ID, _PIN)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Pin and function for USB_ID according to configuration from OTG_ID.  <a href="group__otg__group.html#ga1eac01e72e370946e44c6e372e77a394"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__otg__group.html#ga67896e3d73053c7c3abfa5956dc47dbd">OTG_ID_FUNCTION</a>&#160;&#160;&#160;ATPASTE2(OTG_ID, _FUNCTION)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__otg__group.html#gaa8520a37f119fe71fa225da806595233">otg_input_id_pin</a>()</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Input OTG_ID from its pin.  <a href="group__otg__group.html#gaa8520a37f119fe71fa225da806595233"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__otg__group.html#gaf5cc6e51a0bd88c118f63a999e7cf759">Is_otg_id_pin_input</a>()</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Test if OTG_ID is input from its pin.  <a href="group__otg__group.html#gaf5cc6e51a0bd88c118f63a999e7cf759"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__otg__group.html#ga8c345f8663b1f3432cb9882298e90a5b">otg_enable_id_pin</a>()&#160;&#160;&#160;(Set_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_UIDE_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable external OTG_ID pin (listened to by USB)  <a href="group__otg__group.html#ga8c345f8663b1f3432cb9882298e90a5b"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__otg__group.html#ga8ad60737541846833dbddf8e92828e40">otg_disable_id_pin</a>()&#160;&#160;&#160;(Clr_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_UIDE_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable external OTG_ID pin (ignored by USB)  <a href="group__otg__group.html#ga8ad60737541846833dbddf8e92828e40"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__otg__group.html#ga0c4344aeac9372eb1c455f23a844e1c8">Is_otg_id_pin_enabled</a>()&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_UIDE_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Test if external OTG_ID pin enabled (listened to by USB)  <a href="group__otg__group.html#ga0c4344aeac9372eb1c455f23a844e1c8"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__otg__group.html#ga0a20b90b831ebf250983ef5e15f6d561">otg_force_device_mode</a>()&#160;&#160;&#160;(Set_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_UIMOD_MASK), otg_disable_id_pin())</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable external OTG_ID pin and force device mode.  <a href="group__otg__group.html#ga0a20b90b831ebf250983ef5e15f6d561"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__otg__group.html#gab9ff6cbcfe6c371a2cb9493c182fa6a8">Is_otg_device_mode_forced</a>()&#160;&#160;&#160;(!Is_otg_id_pin_enabled() &amp;&amp; Tst_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_UIMOD_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Test if device mode is forced.  <a href="group__otg__group.html#gab9ff6cbcfe6c371a2cb9493c182fa6a8"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__otg__group.html#ga7a96147ad9ff7531f799c5e2127efad1">otg_force_host_mode</a>()&#160;&#160;&#160;(Clr_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_UIMOD_MASK), otg_disable_id_pin())</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable external OTG_ID pin and force host mode.  <a href="group__otg__group.html#ga7a96147ad9ff7531f799c5e2127efad1"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__otg__group.html#ga8d245cf2f27f09d9ae4dd6e68ef451eb">Is_otg_host_mode_forced</a>()&#160;&#160;&#160;(!Is_otg_id_pin_enabled() &amp;&amp; !Tst_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_UIMOD_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Test if host mode is forced.  <a href="group__otg__group.html#ga8d245cf2f27f09d9ae4dd6e68ef451eb"></a><br/></td></tr>
<tr><td colspan="2"><div class="groupHeader">USBC OTG ID pin interrupt management</div></td></tr>
<tr><td colspan="2"><div class="groupText"><p>These macros manage the ID pin interrupt </p>
</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__otg__group.html#ga873ba3797934aa55fdf0d179496e0e89">otg_enable_id_interrupt</a>()&#160;&#160;&#160;(Set_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_IDTE_MASK))</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__otg__group.html#ga88d47c2dfdbd1c720326b011db6a7ebd">otg_disable_id_interrupt</a>()&#160;&#160;&#160;(Clr_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_IDTE_MASK))</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__otg__group.html#gaee416d9364a73b24f67271cab0f697c5">Is_otg_id_interrupt_enabled</a>()&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_IDTE_MASK))</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__otg__group.html#ga75ab090e520e22605a84c77048814e9a">Is_otg_id_device</a>()&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbsta, AVR32_USBC_USBSTA_ID_MASK))</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__otg__group.html#ga473adb587b33ff08bc9afa2a916087b0">otg_ack_id_transition</a>()&#160;&#160;&#160;(AVR32_USBC.usbstaclr = AVR32_USBC_USBSTACLR_IDTIC_MASK)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__otg__group.html#ga221ed96e5450a2d29fdf265a99c430fc">otg_raise_id_transition</a>()&#160;&#160;&#160;(AVR32_USBC.usbstaset = AVR32_USBC_USBSTASET_IDTIS_MASK)</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__otg__group.html#gad080cf4cce7110b5540021accd4e7f4c">Is_otg_id_transition</a>()&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbsta, AVR32_USBC_USBSTA_IDTI_MASK))</td></tr>
<tr><td colspan="2"><div class="groupHeader">USBC OTG main management</div></td></tr>
<tr><td colspan="2"><div class="groupText"><p>These macros allows to enable/disable pad and USBC hardware </p>
</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a75d73881ecb7e5bb189945a44eaca926">otg_enable</a>()&#160;&#160;&#160;(Set_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_USBE_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable USB macro.  <a href="#a75d73881ecb7e5bb189945a44eaca926"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#abded673e54cd1ae77635e96b8014fde0">otg_disable</a>()&#160;&#160;&#160;(Clr_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_USBE_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable USB macro.  <a href="#abded673e54cd1ae77635e96b8014fde0"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a8b59dd3e898747ba11b77e043721269d">Is_otg_enabled</a>()&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_USBE_MASK))</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a17f769bdbef3aa2b409e7d1f38a476e2">otg_enable_pad</a>()&#160;&#160;&#160;(Set_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_OTGPADE_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable OTG pad.  <a href="#a17f769bdbef3aa2b409e7d1f38a476e2"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#afb8ac7fd28e55bb74eca244bb55e5aa9">otg_disable_pad</a>()&#160;&#160;&#160;(Clr_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_OTGPADE_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable OTG pad.  <a href="#afb8ac7fd28e55bb74eca244bb55e5aa9"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a27d435d22716763155f5adc4e554ddc6">Is_otg_pad_enabled</a>()&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_OTGPADE_MASK))</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a810838fc4e0d3e2c8e85d5437f95f43b">Is_clock_usable</a>()&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbsta, AVR32_USBC_USBSTA_CLKUSABLE_MASK))</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a077fe50b8211bbffb2e85af21bdd7270">otg_freeze_clock</a>()&#160;&#160;&#160;(Set_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_FRZCLK_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Stop (freeze) internal USB clock.  <a href="#a077fe50b8211bbffb2e85af21bdd7270"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a5ae16bfde864eeae8d476100598ed30f">otg_unfreeze_clock</a>()&#160;&#160;&#160;(Clr_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_FRZCLK_MASK))</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#acd2a715ca89a19b1666139d2e0a8e16b">Is_otg_clock_frozen</a>()&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_FRZCLK_MASK))</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a16a8c715695f8bd79f4d92612b4e31dd">otg_configure_timeout</a>(timer, timeout)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Configure time-out of specified OTG timer.  <a href="#a16a8c715695f8bd79f4d92612b4e31dd"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a20d5c018f8b887738566a4c72b98a985">otg_get_timeout</a>(timer)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Get configured time-out of specified OTG timer.  <a href="#a20d5c018f8b887738566a4c72b98a985"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a1363f07ff7661cd17b377a123c7909e6">otg_get_fsm_drd_state</a>()&#160;&#160;&#160;(Rd_bitfield(AVR32_USBC.usbfsm, AVR32_USBC_USBFSM_DRDSTATE_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the dual-role device state of the internal USB finite state machine of the USBC controller.  <a href="#a1363f07ff7661cd17b377a123c7909e6"></a><br/></td></tr>
<tr><td colspan="2"><div class="groupHeader">USBC OTG hardware protocol</div></td></tr>
<tr><td colspan="2"><div class="groupText"><p>These macros manages the hardware OTG protocol </p>
</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a1c36c82d1a43f6ebc4fd3dfb94c11ec9">otg_device_initiate_hnp</a>()&#160;&#160;&#160;(Set_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_HNPREQ_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">initiates a Host Negociation Protocol  <a href="#a1c36c82d1a43f6ebc4fd3dfb94c11ec9"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a633db7d6340f7efb1394bb8e980ccb20">otg_host_accept_hnp</a>()&#160;&#160;&#160;(Set_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_HNPREQ_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">accepts a Host Negociation Protocol  <a href="#a633db7d6340f7efb1394bb8e980ccb20"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a4da32aa5db53b7cfd8af8d90924bb230">otg_host_reject_hnp</a>()&#160;&#160;&#160;(Clr_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_HNPREQ_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">rejects a Host Negociation Protocol  <a href="#a4da32aa5db53b7cfd8af8d90924bb230"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#ae135432701d4f044161b713685365e72">otg_device_initiate_srp</a>()&#160;&#160;&#160;(Set_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_SRPREQ_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">initiates a Session Request Protocol  <a href="#ae135432701d4f044161b713685365e72"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#af495eeaf0931f16f8dc5c9d84e81a18f">otg_select_vbus_srp_method</a>()&#160;&#160;&#160;(Set_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_SRPSEL_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">selects VBus as SRP method  <a href="#af495eeaf0931f16f8dc5c9d84e81a18f"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a3bdcb7b1a692501cfd3917fc63a696d0">Is_otg_vbus_srp_method_selected</a>()&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_SRPSEL_MASK))</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a84d0299bcf24c2f5c7d120cc285bd9cb">otg_select_data_srp_method</a>()&#160;&#160;&#160;(Clr_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_SRPSEL_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">selects data line as SRP method  <a href="#a84d0299bcf24c2f5c7d120cc285bd9cb"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#aaa8eabadd478e11ed88f864fbfdbf22e">Is_otg_data_srp_method_selected</a>()&#160;&#160;&#160;(!Is_otg_vbus_srp_method_selected())</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a7182496d8ec7719dd1d416667d957a8f">Is_otg_hnp</a>()&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_HNPREQ_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">tests if a HNP occurs  <a href="#a7182496d8ec7719dd1d416667d957a8f"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a3569130bf8220eb9399d4961a04ae581">Is_otg_device_srp</a>()&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_SRPREQ_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">tests if a SRP from device occurs  <a href="#a3569130bf8220eb9399d4961a04ae581"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a455df45be6edd15b0997a8770f315244">otg_enable_hnp_error_interrupt</a>()&#160;&#160;&#160;(Set_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_HNPERRE_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">enables HNP error interrupt  <a href="#a455df45be6edd15b0997a8770f315244"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a59af15ff1a2c87e443811121eb4183d5">otg_disable_hnp_error_interrupt</a>()&#160;&#160;&#160;(Clr_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_HNPERRE_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">disables HNP error interrupt  <a href="#a59af15ff1a2c87e443811121eb4183d5"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a733df4614f72f42895ed72dfbfba74cf">Is_otg_hnp_error_interrupt_enabled</a>()&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_HNPERRE_MASK))</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#ab9cc97891223d01fe86dc9a6fee326be">otg_ack_hnp_error_interrupt</a>()&#160;&#160;&#160;(AVR32_USBC.usbstaclr = AVR32_USBC_USBSTACLR_HNPERRIC_MASK)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">acks HNP error interrupt  <a href="#ab9cc97891223d01fe86dc9a6fee326be"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#aee546eff445b99ac231391901e7854aa">otg_raise_hnp_error_interrupt</a>()&#160;&#160;&#160;(AVR32_USBC.usbstaset = AVR32_USBC_USBSTASET_HNPERRIS_MASK)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">raises HNP error interrupt  <a href="#aee546eff445b99ac231391901e7854aa"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a224b13bd3ddfffca1fa08aacb55364f3">Is_otg_hnp_error_interrupt</a>()&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbsta, AVR32_USBC_USBSTA_HNPERRI_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">tests if a HNP error occurs  <a href="#a224b13bd3ddfffca1fa08aacb55364f3"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#ac5c0b8f0ee712ecfb8673aef9aac94da">otg_enable_role_exchange_interrupt</a>()&#160;&#160;&#160;(Set_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_ROLEEXE_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">enables role exchange interrupt  <a href="#ac5c0b8f0ee712ecfb8673aef9aac94da"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a032a4c6aef484f02cd80b795f1c7173c">otg_disable_role_exchange_interrupt</a>()&#160;&#160;&#160;(Clr_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_ROLEEXE_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">disables role exchange interrupt  <a href="#a032a4c6aef484f02cd80b795f1c7173c"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a041dcf4542463a455dd91ba7c2e1364c">Is_otg_role_exchange_interrupt_enabled</a>()&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_ROLEEXE_MASK))</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a5ea461b564ec80f5a8e7ae55eebed3bb">otg_ack_role_exchange_interrupt</a>()&#160;&#160;&#160;(AVR32_USBC.usbstaclr = AVR32_USBC_USBSTACLR_ROLEEXIC_MASK)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">acks role exchange interrupt  <a href="#a5ea461b564ec80f5a8e7ae55eebed3bb"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a053451388b18df7fabfae4ca2515ee37">otg_raise_role_exchange_interrupt</a>()&#160;&#160;&#160;(AVR32_USBC.usbstaset = AVR32_USBC_USBSTASET_ROLEEXIS_MASK)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">raises role exchange interrupt  <a href="#a053451388b18df7fabfae4ca2515ee37"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a6a029c290011fb9b6b90528b70559607">Is_otg_role_exchange_interrupt</a>()&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbsta, AVR32_USBC_USBSTA_ROLEEXI_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">tests if a role exchange occurs  <a href="#a6a029c290011fb9b6b90528b70559607"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a1a4a2560928e0c885afe7a2e3248df64">otg_enable_srp_interrupt</a>()&#160;&#160;&#160;(Set_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_SRPE_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">enables SRP interrupt  <a href="#a1a4a2560928e0c885afe7a2e3248df64"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#ac06a1dc7871c5776746a0cbeb59a4d46">otg_disable_srp_interrupt</a>()&#160;&#160;&#160;(Clr_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_SRPE_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">disables SRP interrupt  <a href="#ac06a1dc7871c5776746a0cbeb59a4d46"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a74f9c5c01442893c41d57407643bc0ba">Is_otg_srp_interrupt_enabled</a>()&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_SRPE_MASK))</td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#a69db3b99dccd18690c93a20d5593bd08">otg_ack_srp_interrupt</a>()&#160;&#160;&#160;(AVR32_USBC.usbstaclr = AVR32_USBC_USBSTACLR_SRPIC_MASK)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">acks SRP interrupt  <a href="#a69db3b99dccd18690c93a20d5593bd08"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#ad4d6485b59f1a95a60c447fa6b9f046f">otg_raise_srp_interrupt</a>()&#160;&#160;&#160;(AVR32_USBC.usbstaset = AVR32_USBC_USBSTASET_SRPIS_MASK)</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">raises SRP interrupt  <a href="#ad4d6485b59f1a95a60c447fa6b9f046f"></a><br/></td></tr>
<tr><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="usbc__otg_8h.html#ac8632ba7878c2ca7c7d12facb279b25b">Is_otg_srp_interrupt</a>()&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbsta, AVR32_USBC_USBSTA_SRPI_MASK))</td></tr>
<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">tests if a SRP occurs  <a href="#ac8632ba7878c2ca7c7d12facb279b25b"></a><br/></td></tr>
</table>
<hr/><a name="details" id="details"></a><h2>Detailed Description</h2>
<div class="textblock"><p>USBC OTG Driver header file. </p>
<p>Copyright (C) 2009 Atmel Corporation. All rights reserved. </p>
</div><hr/><h2>Define Documentation</h2>
<a class="anchor" id="a810838fc4e0d3e2c8e85d5437f95f43b"></a><!-- doxytag: member="usbc_otg.h::Is_clock_usable" ref="a810838fc4e0d3e2c8e85d5437f95f43b" args="()" -->
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          <td class="memname">#define Is_clock_usable</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbsta, AVR32_USBC_USBSTA_CLKUSABLE_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">
<p>Check Clock Usable For parts with HS feature, this one corresponding at UTMI clock </p>

</div>
</div>
<a class="anchor" id="acd2a715ca89a19b1666139d2e0a8e16b"></a><!-- doxytag: member="usbc_otg.h::Is_otg_clock_frozen" ref="acd2a715ca89a19b1666139d2e0a8e16b" args="()" -->
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          <td class="memname">#define Is_otg_clock_frozen</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_FRZCLK_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

</div>
</div>
<a class="anchor" id="aaa8eabadd478e11ed88f864fbfdbf22e"></a><!-- doxytag: member="usbc_otg.h::Is_otg_data_srp_method_selected" ref="aaa8eabadd478e11ed88f864fbfdbf22e" args="()" -->
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          <td class="memname">#define Is_otg_data_srp_method_selected</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(!Is_otg_vbus_srp_method_selected())</td>
        </tr>
      </table>
</div>
<div class="memdoc">

</div>
</div>
<a class="anchor" id="a3569130bf8220eb9399d4961a04ae581"></a><!-- doxytag: member="usbc_otg.h::Is_otg_device_srp" ref="a3569130bf8220eb9399d4961a04ae581" args="()" -->
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      <table class="memname">
        <tr>
          <td class="memname">#define Is_otg_device_srp</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_SRPREQ_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>tests if a SRP from device occurs </p>

</div>
</div>
<a class="anchor" id="a8b59dd3e898747ba11b77e043721269d"></a><!-- doxytag: member="usbc_otg.h::Is_otg_enabled" ref="a8b59dd3e898747ba11b77e043721269d" args="()" -->
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      <table class="memname">
        <tr>
          <td class="memname">#define Is_otg_enabled</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_USBE_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

</div>
</div>
<a class="anchor" id="a7182496d8ec7719dd1d416667d957a8f"></a><!-- doxytag: member="usbc_otg.h::Is_otg_hnp" ref="a7182496d8ec7719dd1d416667d957a8f" args="()" -->
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      <table class="memname">
        <tr>
          <td class="memname">#define Is_otg_hnp</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_HNPREQ_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>tests if a HNP occurs </p>

</div>
</div>
<a class="anchor" id="a224b13bd3ddfffca1fa08aacb55364f3"></a><!-- doxytag: member="usbc_otg.h::Is_otg_hnp_error_interrupt" ref="a224b13bd3ddfffca1fa08aacb55364f3" args="()" -->
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      <table class="memname">
        <tr>
          <td class="memname">#define Is_otg_hnp_error_interrupt</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbsta, AVR32_USBC_USBSTA_HNPERRI_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>tests if a HNP error occurs </p>

</div>
</div>
<a class="anchor" id="a733df4614f72f42895ed72dfbfba74cf"></a><!-- doxytag: member="usbc_otg.h::Is_otg_hnp_error_interrupt_enabled" ref="a733df4614f72f42895ed72dfbfba74cf" args="()" -->
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      <table class="memname">
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          <td class="memname">#define Is_otg_hnp_error_interrupt_enabled</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_HNPERRE_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

</div>
</div>
<a class="anchor" id="a27d435d22716763155f5adc4e554ddc6"></a><!-- doxytag: member="usbc_otg.h::Is_otg_pad_enabled" ref="a27d435d22716763155f5adc4e554ddc6" args="()" -->
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        <tr>
          <td class="memname">#define Is_otg_pad_enabled</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_OTGPADE_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

</div>
</div>
<a class="anchor" id="a6a029c290011fb9b6b90528b70559607"></a><!-- doxytag: member="usbc_otg.h::Is_otg_role_exchange_interrupt" ref="a6a029c290011fb9b6b90528b70559607" args="()" -->
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          <td class="memname">#define Is_otg_role_exchange_interrupt</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbsta, AVR32_USBC_USBSTA_ROLEEXI_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>tests if a role exchange occurs </p>

</div>
</div>
<a class="anchor" id="a041dcf4542463a455dd91ba7c2e1364c"></a><!-- doxytag: member="usbc_otg.h::Is_otg_role_exchange_interrupt_enabled" ref="a041dcf4542463a455dd91ba7c2e1364c" args="()" -->
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          <td class="memname">#define Is_otg_role_exchange_interrupt_enabled</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_ROLEEXE_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

</div>
</div>
<a class="anchor" id="ac8632ba7878c2ca7c7d12facb279b25b"></a><!-- doxytag: member="usbc_otg.h::Is_otg_srp_interrupt" ref="ac8632ba7878c2ca7c7d12facb279b25b" args="()" -->
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        <tr>
          <td class="memname">#define Is_otg_srp_interrupt</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbsta, AVR32_USBC_USBSTA_SRPI_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>tests if a SRP occurs </p>

</div>
</div>
<a class="anchor" id="a74f9c5c01442893c41d57407643bc0ba"></a><!-- doxytag: member="usbc_otg.h::Is_otg_srp_interrupt_enabled" ref="a74f9c5c01442893c41d57407643bc0ba" args="()" -->
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          <td class="memname">#define Is_otg_srp_interrupt_enabled</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_SRPE_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

</div>
</div>
<a class="anchor" id="a3bdcb7b1a692501cfd3917fc63a696d0"></a><!-- doxytag: member="usbc_otg.h::Is_otg_vbus_srp_method_selected" ref="a3bdcb7b1a692501cfd3917fc63a696d0" args="()" -->
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          <td class="memname">#define Is_otg_vbus_srp_method_selected</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Tst_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_SRPSEL_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

</div>
</div>
<a class="anchor" id="ab9cc97891223d01fe86dc9a6fee326be"></a><!-- doxytag: member="usbc_otg.h::otg_ack_hnp_error_interrupt" ref="ab9cc97891223d01fe86dc9a6fee326be" args="()" -->
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          <td class="memname">#define otg_ack_hnp_error_interrupt</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(AVR32_USBC.usbstaclr = AVR32_USBC_USBSTACLR_HNPERRIC_MASK)</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>acks HNP error interrupt </p>

</div>
</div>
<a class="anchor" id="a5ea461b564ec80f5a8e7ae55eebed3bb"></a><!-- doxytag: member="usbc_otg.h::otg_ack_role_exchange_interrupt" ref="a5ea461b564ec80f5a8e7ae55eebed3bb" args="()" -->
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          <td class="memname">#define otg_ack_role_exchange_interrupt</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(AVR32_USBC.usbstaclr = AVR32_USBC_USBSTACLR_ROLEEXIC_MASK)</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>acks role exchange interrupt </p>

</div>
</div>
<a class="anchor" id="a69db3b99dccd18690c93a20d5593bd08"></a><!-- doxytag: member="usbc_otg.h::otg_ack_srp_interrupt" ref="a69db3b99dccd18690c93a20d5593bd08" args="()" -->
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      <table class="memname">
        <tr>
          <td class="memname">#define otg_ack_srp_interrupt</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(AVR32_USBC.usbstaclr = AVR32_USBC_USBSTACLR_SRPIC_MASK)</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>acks SRP interrupt </p>

</div>
</div>
<a class="anchor" id="a16a8c715695f8bd79f4d92612b4e31dd"></a><!-- doxytag: member="usbc_otg.h::otg_configure_timeout" ref="a16a8c715695f8bd79f4d92612b4e31dd" args="(timer, timeout)" -->
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      <table class="memname">
        <tr>
          <td class="memname">#define otg_configure_timeout</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">timer, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">timeout&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<b>Value:</b><div class="fragment"><pre class="fragment">(Set_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_UNLOCK_MASK),\
                                             Wr_bitfield(AVR32_USBC.usbcon, AVR32_USBC_USBCON_TIMPAGE_MASK, timer),\
                                             Wr_bitfield(AVR32_USBC.usbcon, AVR32_USBC_USBCON_TIMVALUE_MASK, timeout),\
                                             Clr_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_UNLOCK_MASK))
</pre></div>
<p>Configure time-out of specified OTG timer. </p>

</div>
</div>
<a class="anchor" id="a1c36c82d1a43f6ebc4fd3dfb94c11ec9"></a><!-- doxytag: member="usbc_otg.h::otg_device_initiate_hnp" ref="a1c36c82d1a43f6ebc4fd3dfb94c11ec9" args="()" -->
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          <td class="memname">#define otg_device_initiate_hnp</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Set_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_HNPREQ_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>initiates a Host Negociation Protocol </p>

</div>
</div>
<a class="anchor" id="ae135432701d4f044161b713685365e72"></a><!-- doxytag: member="usbc_otg.h::otg_device_initiate_srp" ref="ae135432701d4f044161b713685365e72" args="()" -->
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          <td class="memname">#define otg_device_initiate_srp</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Set_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_SRPREQ_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>initiates a Session Request Protocol </p>

</div>
</div>
<a class="anchor" id="abded673e54cd1ae77635e96b8014fde0"></a><!-- doxytag: member="usbc_otg.h::otg_disable" ref="abded673e54cd1ae77635e96b8014fde0" args="()" -->
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          <td class="memname">#define otg_disable</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Clr_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_USBE_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>Disable USB macro. </p>

</div>
</div>
<a class="anchor" id="a59af15ff1a2c87e443811121eb4183d5"></a><!-- doxytag: member="usbc_otg.h::otg_disable_hnp_error_interrupt" ref="a59af15ff1a2c87e443811121eb4183d5" args="()" -->
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          <td class="memname">#define otg_disable_hnp_error_interrupt</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Clr_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_HNPERRE_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>disables HNP error interrupt </p>

</div>
</div>
<a class="anchor" id="afb8ac7fd28e55bb74eca244bb55e5aa9"></a><!-- doxytag: member="usbc_otg.h::otg_disable_pad" ref="afb8ac7fd28e55bb74eca244bb55e5aa9" args="()" -->
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          <td class="memname">#define otg_disable_pad</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Clr_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_OTGPADE_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>Disable OTG pad. </p>

</div>
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<a class="anchor" id="a032a4c6aef484f02cd80b795f1c7173c"></a><!-- doxytag: member="usbc_otg.h::otg_disable_role_exchange_interrupt" ref="a032a4c6aef484f02cd80b795f1c7173c" args="()" -->
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          <td class="memname">#define otg_disable_role_exchange_interrupt</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Clr_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_ROLEEXE_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>disables role exchange interrupt </p>

</div>
</div>
<a class="anchor" id="ac06a1dc7871c5776746a0cbeb59a4d46"></a><!-- doxytag: member="usbc_otg.h::otg_disable_srp_interrupt" ref="ac06a1dc7871c5776746a0cbeb59a4d46" args="()" -->
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          <td class="memname">#define otg_disable_srp_interrupt</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Clr_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_SRPE_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>disables SRP interrupt </p>

</div>
</div>
<a class="anchor" id="a75d73881ecb7e5bb189945a44eaca926"></a><!-- doxytag: member="usbc_otg.h::otg_enable" ref="a75d73881ecb7e5bb189945a44eaca926" args="()" -->
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          <td class="memname">#define otg_enable</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Set_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_USBE_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>Enable USB macro. </p>

</div>
</div>
<a class="anchor" id="a455df45be6edd15b0997a8770f315244"></a><!-- doxytag: member="usbc_otg.h::otg_enable_hnp_error_interrupt" ref="a455df45be6edd15b0997a8770f315244" args="()" -->
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      <table class="memname">
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          <td class="memname">#define otg_enable_hnp_error_interrupt</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Set_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_HNPERRE_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>enables HNP error interrupt </p>

</div>
</div>
<a class="anchor" id="a17f769bdbef3aa2b409e7d1f38a476e2"></a><!-- doxytag: member="usbc_otg.h::otg_enable_pad" ref="a17f769bdbef3aa2b409e7d1f38a476e2" args="()" -->
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      <table class="memname">
        <tr>
          <td class="memname">#define otg_enable_pad</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Set_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_OTGPADE_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>Enable OTG pad. </p>

</div>
</div>
<a class="anchor" id="ac5c0b8f0ee712ecfb8673aef9aac94da"></a><!-- doxytag: member="usbc_otg.h::otg_enable_role_exchange_interrupt" ref="ac5c0b8f0ee712ecfb8673aef9aac94da" args="()" -->
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      <table class="memname">
        <tr>
          <td class="memname">#define otg_enable_role_exchange_interrupt</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Set_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_ROLEEXE_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>enables role exchange interrupt </p>

</div>
</div>
<a class="anchor" id="a1a4a2560928e0c885afe7a2e3248df64"></a><!-- doxytag: member="usbc_otg.h::otg_enable_srp_interrupt" ref="a1a4a2560928e0c885afe7a2e3248df64" args="()" -->
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          <td class="memname">#define otg_enable_srp_interrupt</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Set_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_SRPE_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>enables SRP interrupt </p>

</div>
</div>
<a class="anchor" id="a077fe50b8211bbffb2e85af21bdd7270"></a><!-- doxytag: member="usbc_otg.h::otg_freeze_clock" ref="a077fe50b8211bbffb2e85af21bdd7270" args="()" -->
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      <table class="memname">
        <tr>
          <td class="memname">#define otg_freeze_clock</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Set_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_FRZCLK_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>Stop (freeze) internal USB clock. </p>

</div>
</div>
<a class="anchor" id="a1363f07ff7661cd17b377a123c7909e6"></a><!-- doxytag: member="usbc_otg.h::otg_get_fsm_drd_state" ref="a1363f07ff7661cd17b377a123c7909e6" args="()" -->
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      <table class="memname">
        <tr>
          <td class="memname">#define otg_get_fsm_drd_state</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Rd_bitfield(AVR32_USBC.usbfsm, AVR32_USBC_USBFSM_DRDSTATE_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>Get the dual-role device state of the internal USB finite state machine of the USBC controller. </p>

</div>
</div>
<a class="anchor" id="a20d5c018f8b887738566a4c72b98a985"></a><!-- doxytag: member="usbc_otg.h::otg_get_timeout" ref="a20d5c018f8b887738566a4c72b98a985" args="(timer)" -->
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      <table class="memname">
        <tr>
          <td class="memname">#define otg_get_timeout</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">timer</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div>
<div class="memdoc">
<b>Value:</b><div class="fragment"><pre class="fragment">(Set_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_UNLOCK_MASK),\
                                             Wr_bitfield(AVR32_USBC.usbcon, AVR32_USBC_USBCON_TIMPAGE_MASK, timer),\
                                             Clr_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_UNLOCK_MASK),\
                                             Rd_bitfield(AVR32_USBC.usbcon, AVR32_USBC_USBCON_TIMVALUE_MASK))
</pre></div>
<p>Get configured time-out of specified OTG timer. </p>

</div>
</div>
<a class="anchor" id="a633db7d6340f7efb1394bb8e980ccb20"></a><!-- doxytag: member="usbc_otg.h::otg_host_accept_hnp" ref="a633db7d6340f7efb1394bb8e980ccb20" args="()" -->
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      <table class="memname">
        <tr>
          <td class="memname">#define otg_host_accept_hnp</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Set_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_HNPREQ_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>accepts a Host Negociation Protocol </p>

</div>
</div>
<a class="anchor" id="a4da32aa5db53b7cfd8af8d90924bb230"></a><!-- doxytag: member="usbc_otg.h::otg_host_reject_hnp" ref="a4da32aa5db53b7cfd8af8d90924bb230" args="()" -->
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      <table class="memname">
        <tr>
          <td class="memname">#define otg_host_reject_hnp</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Clr_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_HNPREQ_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>rejects a Host Negociation Protocol </p>

</div>
</div>
<a class="anchor" id="aee546eff445b99ac231391901e7854aa"></a><!-- doxytag: member="usbc_otg.h::otg_raise_hnp_error_interrupt" ref="aee546eff445b99ac231391901e7854aa" args="()" -->
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      <table class="memname">
        <tr>
          <td class="memname">#define otg_raise_hnp_error_interrupt</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(AVR32_USBC.usbstaset = AVR32_USBC_USBSTASET_HNPERRIS_MASK)</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>raises HNP error interrupt </p>

</div>
</div>
<a class="anchor" id="a053451388b18df7fabfae4ca2515ee37"></a><!-- doxytag: member="usbc_otg.h::otg_raise_role_exchange_interrupt" ref="a053451388b18df7fabfae4ca2515ee37" args="()" -->
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      <table class="memname">
        <tr>
          <td class="memname">#define otg_raise_role_exchange_interrupt</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(AVR32_USBC.usbstaset = AVR32_USBC_USBSTASET_ROLEEXIS_MASK)</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>raises role exchange interrupt </p>

</div>
</div>
<a class="anchor" id="ad4d6485b59f1a95a60c447fa6b9f046f"></a><!-- doxytag: member="usbc_otg.h::otg_raise_srp_interrupt" ref="ad4d6485b59f1a95a60c447fa6b9f046f" args="()" -->
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        <tr>
          <td class="memname">#define otg_raise_srp_interrupt</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(AVR32_USBC.usbstaset = AVR32_USBC_USBSTASET_SRPIS_MASK)</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>raises SRP interrupt </p>

</div>
</div>
<a class="anchor" id="a84d0299bcf24c2f5c7d120cc285bd9cb"></a><!-- doxytag: member="usbc_otg.h::otg_select_data_srp_method" ref="a84d0299bcf24c2f5c7d120cc285bd9cb" args="()" -->
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          <td class="memname">#define otg_select_data_srp_method</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Clr_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_SRPSEL_MASK))</td>
        </tr>
      </table>
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<div class="memdoc">

<p>selects data line as SRP method </p>

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<a class="anchor" id="af495eeaf0931f16f8dc5c9d84e81a18f"></a><!-- doxytag: member="usbc_otg.h::otg_select_vbus_srp_method" ref="af495eeaf0931f16f8dc5c9d84e81a18f" args="()" -->
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define otg_select_vbus_srp_method</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Set_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_SRPSEL_MASK))</td>
        </tr>
      </table>
</div>
<div class="memdoc">

<p>selects VBus as SRP method </p>

</div>
</div>
<a class="anchor" id="a5ae16bfde864eeae8d476100598ed30f"></a><!-- doxytag: member="usbc_otg.h::otg_unfreeze_clock" ref="a5ae16bfde864eeae8d476100598ed30f" args="()" -->
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<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define otg_unfreeze_clock</td>
          <td>(</td>
          <td class="paramname"></td><td>)</td>
          <td>&#160;&#160;&#160;(Clr_bits(AVR32_USBC.usbcon, AVR32_USBC_USBCON_FRZCLK_MASK))</td>
        </tr>
      </table>
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<div class="memdoc">

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